Rev 1.3 8/13
Copyright ?2013 by Silicon Laboratories
EM351/EM357
EM351/EM357
High-Performance, Integrated ZigBee/802.15.4 System-on-Chip
Features
-  32-bit ARM?/SPAN> Cortex -M3 processor
-  2.4 GHz IEEE 802.15.4-2003 transceiver & lower MAC
-  128 or 192 kB flash, with optional read protection
-  12 kB RAM memory
-  AES128 encryption accelerator
-  Flexible ADC, UART/SPI/TWI serial communications, 
and general purpose timers
-  24 highly configurable GPIOs with Schmitt trigger inputs 
Industry-leading ARM?Cortex -M3 processor
-  Leading 32-bit processing performance
-  Highly efficient Thumb-2 instruction set
-  Operation at 6, 12, or 24 MHz
-  Flexible Nested Vectored Interrupt Controller
Low power consumption, advanced management
-  RX Current (w/ CPU): 26 mA
-  TX Current (w/ CPU, +3 dBm TX): 31 mA 
-  Low deep sleep current, with retained RAM and GPIO: 
400 nA without/800 nA with sleep timer
-  Low-frequency internal RC oscillator for low-power sleep 
timing
-  High-frequency internal RC oscillator for fast (110 ?/SPAN>s) 
processor start-up from sleep
Exceptional RF Performance
-  Normal mode link budget up to 103 dB; configurable up 
to 110 dB
-  100 dBm normal RX sensitivity; configurable to  
102 dBm (1% PER, 20 byte packet)
-  +3 dB normal mode output power; configurable up to 
+8 dBm
-  Robust Wi-Fi and Bluetooth coexistence
Innovative network and processor debug
-  Packet Trace Port for non-intrusive packet trace with 
Ember development tools
-  Serial Wire/JTAG interface
-  Standard ARM debug capabilities: Flash Patch & Break-
point; Data Watchpoint & Trace; Instrumentation Trace
Macrocell
Application Flexibility
-  Single voltage operation: 2.13.6 V with internal 1.8 and 
1.25
 V regulators
-  Optional 32.768 kHz crystal for higher timer accuracy
-  Low external component count with single 24 MHz  
crystal
-  Support for external power amplifier
-  Small 7x7 mm 48-pin QFN package
ADC
RF_P,N
Program
Flash
128/192 kB
Data
RAM
12 kB
HF crystal
OSC
LF crystal
OSC
General
Purpose
ADC
Serial
Wire and
JTAG
debug
Internal LF
RC-OSC
GPIO multiplexor switch
Chip
manager
1.8V
Regulator
Bias
2
nd
 level
Interrupt
controller
RF_TX_ALT_P,N
OSCA
OSCB
PA 7:0 , PB 7:0 , PC 7:0
Encryption
acclerator
IF
Always
Powered
Domain
ARM
?/DIV>
 Cortex
TM
-M3
 
CPU with NVIC
 and MPU
VREG_OUT
Watchdog
PA select
LNA
PA
PA
DAC
MAC
+
Baseband
Sleep
timer
POR
nRESET
General
purpose
timers
GPIO
registers
UART/
SPI/TWI
SYNTH
Internal HF
RC-OSC
TX_ACTIVE
SWCLK,
JTCK
Calibration
ADC
Packet Trace
CPU debug
TPIU/ITM/
FPB/DWT
1.25V
Regulator
VDD_CORE
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